SY50213W Infinite Restart Failure: OEM Root Cause Analysis and Solutions
Core Conclusions
90% of SY50213W infinite restart failures stem from insufficient power supply energy at the VIN pin. An oversized startup resistor RST or undersized VIN capacitor CVIN depletes energy storage before output stabilization, triggering VVIN_OFF (typical 4.2V) shutdown and repeated reboot cycles. Other secondary causes mainly include auxiliary power supply failure, false SCP triggering, and transformer saturation.
Underlying Failure Principle
The SY50213W startup process is divided into two stages: tSTC (CVIN charges to VVIN_ON≈21.3V) and tSTO (output voltage establishment and power takeover by the auxiliary winding). If the energy stored in CVIN cannot support the tSTO stage, the VIN voltage drops below VVIN_OFF (typical 4.2V), turning off the IC. The chip restarts after CVIN recharges, forming a continuous hiccup cycle.
Key Constraints:
- RST Range:
VBUS_MAX/IVIN_OVP < RST < VBUS_MIN/IST(namely 67.87kΩ < RST < 25.46MΩ) - CVIN Calculation:
CVIN = [(VBUS_MIN/RST) - IST] × tST / VVIN_ON
Startup failure will definitely occur when
(VBUS_MIN/RST - IST) × tST < CVIN × VVIN_ON.6 Common Failure Causes: Troubleshooting and Permanent Solutions
1. Excessively Large Startup Resistor RST or Undersized CVIN Capacitor
Causes
RST exceeding 25MΩ or CVIN lower than the theoretical calculated value (e.g., <2.59µF) leads to insufficient IST margin under 90VAC low-voltage input, resulting in complete CVIN energy depletion during the tSTO phase.
Troubleshooting Methods
- Use an oscilloscope to monitor the VIN pin: Observe if the voltage slowly rises to 21V then drops rapidly below 4V with a cycle of 0.5-2 seconds
- Measure the RST resistance with a multimeter to confirm it is within the nominal range
- Calculate the low-voltage input charging current:
I_charge = 90×√2 / RST - 5µA, which should be greater than 2µA
Permanent Solutions
- Reduce RST to 3-5MΩ (typical recommended value: 5.4MΩ)
- Mandatorily adopt 4.7µF/50V or higher ceramic capacitors or low ESR electrolytic capacitors
- Verification Formula:
RST < 90×√2 / (CVIN×VVIN_ON/tST + IST)
2. Delayed Power Takeover by Auxiliary Winding
Causes
Insufficient turns of the transformer auxiliary winding NAUX, or open circuit/excess resistance in the D2/R5 path, preventing the auxiliary winding from maintaining VIN voltage after output stabilization.
Troubleshooting Methods
- Synchronously monitor VIN and VOUT with an oscilloscope: If VOUT starts to rise while VIN drops simultaneously, the auxiliary power supply fails to engage
- Check if D2 (e.g., S1M) is reversely connected, open-circuited or has excessive forward voltage drop
- Verify R5 (typical 5.1Ω) for cold solder joints or improper use of resistors above 20Ω
Permanent Solutions
- Calculate NAUX per the formula:
NAUX = NS × VVIN / VOUT, recommended VVIN=12V (Datasheet P11) - Taking 5V/2.1A design as an example: NAUX=10 turns (rounded up from 9.6 when NS=4)
- Ensure D2 is a fast recovery diode, R5≤10Ω, and C4≥4.7µF
3. False Triggering of Output Short Circuit Protection (SCP)
Causes
Secondary short circuit, oversized RAUX filter resistor, or missing valley signal detection at the VSEN pin forces the IC into hiccup mode. Excessively large output capacitors also cause abnormal freewheeling duration of secondary diodes.
Secondary short circuit, oversized RAUX filter resistor, or missing valley signal detection at the VSEN pin forces the IC into hiccup mode. Excessively large output capacitors also cause abnormal freewheeling duration of secondary diodes.
Troubleshooting Methods
- Disconnect all loads; if restart persists at no load, load short circuit can be ruled out
- Inspect VSEN waveform: Valley signals should be detected after turn-off in normal startup, while no valley signal appears under short circuit conditions
- Measure RAUX resistance to exclude improper use of resistors above 10Ω
Permanent Solutions
- Ensure RAUX≤10Ω (typical 5.1Ω) to prevent over-filtering of auxiliary winding spikes (Datasheet P9)
- Check for breakdown of the secondary diode DS1
- Select output capacitors per Cout=3.7m×Iout/Vout (Datasheet P14); 1270-1680µF for 5V/2A applications
4. Transformer Saturation Triggering Primary Overcurrent Protection
Causes
Insufficient transformer air gap, low inductance LM or excessive NPS leads to primary peak current exceeding the ISEN current limit threshold (0.85-1.16V), causing protection activation and automatic restart.
Troubleshooting Methods
- Monitor ISEN pin voltage with an oscilloscope: Immediate voltage rise above 0.85V upon startup indicates current limit triggering
- Check transformer temperature rise; core temperature rises abnormally under saturation
- Calculate LM:
LM = 2×POUT / (η×IP_PK_MAX²×fS_MIN)
Permanent Solutions
- Maintain LM within 1.0-1.3mH (10W-level applications, Datasheet P15-17)
- Verify turn ratio NPS≤16 (for 5V output) to avoid core saturation under low-voltage input
- Adopt thickened EE16 or EF15-10 magnetic cores with Ae≥38.8mm²
5. VSEN Pin Short Circuit or Upper Divider Resistor Disconnection
Causes
VSEN short to ground, cold solder joint/disconnection of upper divider resistor R6, or lower divider resistor below 2kΩ triggers the internal protection mechanism, shutting down switching operation and entering hiccup mode.
Troubleshooting Methods
- Measure VSEN resistance to ground to rule out short circuits
- Inspect R6 (upper divider resistor, typical 91kΩ) for cold solder joints, detachment or out-of-range resistance beyond 20-130kΩ
- Confirm R7 (lower divider resistor) is greater than 2kΩ (Datasheet P9 requirement)
Permanent Solutions
- Keep the VSEN pin lower divider resistor above 2kΩ
- Select R6 within the 20-130kΩ range (91kΩ recommended); calculate R7 per official formulas (Datasheet P20)
- Place divider resistors close to the IC to avoid noise coupling
6. GND Bounce and Sampling Abnormality Caused by PCB Layout
Causes
Common grounding of the ISEN current sense resistor and power ground leads to GND bounce induced by high di/dt current, resulting in false judgment of VVIN or VISEN. Remote placement of VSEN divider resistors from the IC also introduces switching noise.
Common grounding of the ISEN current sense resistor and power ground leads to GND bounce induced by high di/dt current, resulting in false judgment of VVIN or VISEN. Remote placement of VSEN divider resistors from the IC also introduces switching noise.
Troubleshooting Methods
- Measure ISEN pin voltage relative to GND with a differential probe: Check for spikes above 100mV during startup
- Confirm the ground wire of R8 (current sense resistor) is directly connected to the negative terminal of the BUS capacitor (Ground 1)
- Prevent the R8 ground wire from directly connecting to the IC GND pin to avoid large current loops
Permanent Solutions
- Follow the routing sequence: R8 Ground → BUS Capacitor Ground → IC GND with a path length below 10mm (Datasheet P12)
- Mount VSEN divider resistors (R6/R7) close to the IC and route wires away from power loops
- Adopt independent wiring for auxiliary winding ground (Ground 3) and divider resistor ground (Ground 4), with single-point convergence under the IC
5 Practical Engineering Optimization Tips for Direct Implementation
Optimization 1: Select CVIN at 1.5 Times the Theoretical Value
The theoretical value calculated in Datasheet P19 is 2.59µF; select 4.7µF in actual design to cover ceramic capacitor tolerance (±20%) and low-temperature capacity attenuation, ensuring one-time successful startup.
Optimization 2: Matching Verification of RST and CVIN
| VBUS_MIN | Recommended RST | Minimum CVIN | Measured Startup Time |
|---|---|---|---|
| 90VAC | 3.3MΩ | 4.7µF | <1.5s |
| 110VAC | 5.4MΩ | 4.7µF | <2.0s |
| 230VAC | 10MΩ | 2.2µF | <1.0s |
Optimization 3: Redundancy Design for Auxiliary Winding Power Supply
Round up the calculated NAUX value (e.g., 10 turns for a calculated 9.6 turns) to ensure VVIN>11V (explicit requirement in Datasheet P14 Note 2) and avoid insufficient auxiliary voltage under high-voltage input.
Optimization 4: Strict Limitation on RCD Snubber Capacitance
Specified in Datasheet P14 Note 3: When Imin=0.1A, Snubber capacitor≤470pF. Oversized capacitors feature slow discharge, raising the auxiliary voltage platform and interfering with VSEN sampling to cause restart failures.
Optimization 5: Secondary Freewheeling Duration Verification
Datasheet P14 Note 1 requires the secondary diode freewheeling duration to be longer than 1.8µs (minimum off-time) at no load. Insufficient freewheeling time caused by low transformer inductance or heavy load prevents the IC from entering QR mode normally.
Further Reading: For core chip specifications, pin definitions and complete design formulas involved in this article, please refer to our technical document 《SY50213W 800V Integrated Primary-Side Regulation Flyback IC: Core Specifications & Engineering Advantages Analysis》.
Key Parameter Quick Reference: VVIN_ON=21.3V | VVIN_OFF=4.2V | IST=5µA(max) | IVIN_OVP=5.5mA | Recommended CVIN=4.7µF | Recommended RST=3-5MΩ | ISEN_LIM=0.85-1.16V
